FTM Board Club
STMicroelectronics
EVSTGAP2SICSNC
Demonstration board for STGAP2SICSNC isolated 4 A single gate driver

The EVSTGAP2SICSNC is a half bridge evaluation board designed to evaluate the STGAP2SICSNC isolated single gate driver.

Alternatively request theEVSTGAP2SICSN with separate source/sink outputs

The gate driver is characterized by 4 A current capability and rail-to-rail outputs, making the device suitable also for high power inverter applications such as motor drivers in industrial applications equipped with SiC power switch.

The configuration featuring single output pin and Miller CLAMP function allow avoiding gate spikes during fast commutations in half-bridge topologies.

The device integrates protection functions: UVLO and thermal shut down are included to easily design high reliability systems. Dual input pins allow choosing the control signal polarity and implementing HW interlocking protection to avoid cross-conduction in case of controller's malfunction.

The device allows implementing negative gate driving, and the onboard isolated DC-DC converters allow working with optimized driving voltage for SiC.

The EVSTGAP2SICSNC board allows evaluating all the STGAP2SICSNC features while driving a half-bridge power stage with voltage rating up to 520 V. It is possible to increase bus voltage by replacing the power switches with appropriate devices in H2PACK-7L or H2PACK-2L package and the C29 capacitance if needed.

The board components are easy to access and modify to make driver performance evaluation easier under different application conditions and fine adjustment of final application components.

Features
  • Board
    • Half bridge configuration, high voltage rail up to 520 V
    • SCT35N65: 650V, 55 mΩ SiC MOSFET
    • Negative gate driving
    • On board isolated DC-DC converters to supply high-side and low-side gate drivers, fed by VAUX = 5 V, with 5.2 kV maximum isolation
    • 3.3 V VDD logic supply generated onboard or 5 V (externally applied)
    • Easy jumper selection of driving voltage configuration: +17/0 V; +17/-3 V; +19/0 V; +19/-3 V
  • Device
    • Driver current capability: 4 A source/sink @ 25 C
    • 4 A Miller Clamp
    • Short propagation delay: 75 ns
    • UVLO function
    • Gate driving voltage up to 26 V
    • 3.3 V, 5 V TTL/CMOS inputs with hysteresis
    • Temperature shut down protection
    • Stand-by function